vhdl - Why is my Xilinx ISE Simulator crashing? -

i trying make alu floating point numbers.this code , whenever try run simulation of testbench waveform simulator crashes stating this:

isim_beh.exe has stopped working

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; ---- uncomment following library declaration if instantiating ---- xilinx primitives in code. --library unisim; --use unisim.vcomponents.all;  entity fp port( in_one:in std_logic_vector(31 downto 0);         in_two:in std_logic_vector(31 downto 0);         select_line:in std_logic_vector(2 downto 0);         output:out std_logic_vector(31 downto 0)); end fp;  architecture behavioral of fp signal bb:std_logic_vector(31 downto 0); signal j,k,l:std_logic_vector(31 downto 0); component floating  port (ina,inb:in std_logic_vector(31 downto 0);         sss:in std_logic_vector(2 downto 0);         outb:out std_logic_vector(31 downto 0)); end component; component adder port( a:in std_logic_vector(31 downto 0);         b:in std_logic_vector(31 downto 0);         sss:in std_logic_vector(2 downto 0);         oo:out std_logic_vector(31 downto 0)); end component; begin u1:floating port map(in_one,in_two,select_line,j); --when ss=10     multiply chosen u2:adder port map(in_one,in_two,select_line,k);     --when ss=00 addition chosen , when ss=01 subtraction chosen output<=(not in_one) when select_line="100" else           (in_one , in_two) when select_line="101" else           (in_one or in_two) when select_line="110" else           j+k; end behavioral; 

ps floating component multiplication. adder component addition , subtraction.